library ieee;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;

entity splitter is
generic (N : integer := 32);
port (	data_in	: in   std_logic_vector (N-1 downto 0);
		control	: in   std_logic_vector (2 downto 0);
		data_out	: out std_logic_vector (N-1 downto 0)
        );
end splitter;

architecture Behavioral of splitter is

begin
	--the first bit of control is for extending the sign in unsigned and signed fashion
process (data_in, control)
begin
	case control is
		when "111" | "011" =>
			data_out(N-1 downto 0)		<= data_in(N-1 downto 0);
		when "110" =>
			data_out(N-1 downto 16)	<= (others => data_in(15));		--sign ext (signed numbs)
			data_out(15 downto 0)		<= data_in(15 downto 0);
		when "010" =>
			data_out(N-1 downto 16)	<= (others => '0');				--sign ext (unsigned numbs)
			data_out(15 downto 0)		<= data_in(15 downto 0);
		when "101" =>
			data_out(N-1 downto 8)		<= (others => data_in(7));		--sign ext (signed numbs)
			data_out(7 downto 0)		<= data_in(7 downto 0);
		when "001" =>
			data_out(N-1 downto 8)		<= (others => '0');				--sign ext (unsigned numbs)
			data_out(7 downto 0)		<= data_in(7 downto 0);
		when others =>
			data_out					<= (others => '0');
	end case;
end process;

end Behavioral;
